Timings Explained and Discussed

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Timings Explained and Discussed

Postby BGNRS LUCK » Tue Feb 17, 2009 9:30 pm

ok everybody here are the best explaination on timings iv'e seen so far. the first one on the nvidia chips still offfer good direction with intel chips, its just different numbers, the way they react is similar. im currently running some Gskill [ which i really love, great bang for the buck] with my CPU is a E8400 @3771.2 DDR2 1066@ 1117 2.2V 5,6,6,17 / 4,4,7,54,4,CR2. im using a giabite EP43-DSL3 board. i found that when you use fast ddr2 the timings come up as ddr3 especially if you OC it at all. so i always ajust the CAS to TRAS set and have gotten better at adjusting what is TRRD,TWTR,TWR,TRFC,TRTP and CR on my board. so i was wondering what timings some of you others [hot rods included] are running. i know sometimes motherboards have different ways of saying the same thing so its a little like apples to oranges but would love some input as to what works for you and how. thanks, dana
:) [b] So often we ask the questions: What are these timings/subtimings for?[/b]

Well here are some of the answers....

Each chipset (680i/975/965) acts differently to how timings are applied. Some of you are probably familiar with how DDR1 ram acted on timings - DDR2 acts a bit differently and some timings are less important than what they used to be.

The EVGA 680i SLI board has an entire bios section dedicated to ram timings. So why not do some tweaking.
The guide follows the bios order, skipping Command Per Clock which is saved for last.


tCL:
Large influence on stability / Medium influence on bandwidth
From CAS 5 to 4 results change ~5-10mb/s. The same change will most likely be seen when going to CAS 3. This timing is widely seen as most important (Command rate disregarded).
Recommendation: 4 for normal usage, 5 when oc"ing. Tweaked: 3.


tRCD:
Medium influence on stability / Large influence on bandwidth
tRCD going from 4 to 3 gives ~15mb/s. From 5 to 4 also yields 10-15mb/s. This timing is considered second important after CAS, but actually it"s more important on 680i/DDR2.
Recommendation: 4 for oc/normal usage. 5 if you want to push mhz. Tweaked: 3


tRP:
Medium/small influence on stability / Small influence on bandwidth
Results vary close to nothing when changing from 3 to 4 to 5. Still this timing needs to finish its cycle before a new one starts, so dont set it higher than 5.
Recommendation: 4 for oc/normal usage. 5 if you want to push mhz. Tweaked: 3


tRAS:
Small influence on stability / Small influence on bandwidth
tRAS seems to act differently on integer/float results. Integer, going from 15 to 10 changes by ~5mb/s. Float doesnt change.
tRAS is an "end-timing", so dont go to high. And not lower than what tCL+tRCD equals.
Recommendation: 12 for oc/normal usage. 15 if you want to push mhz. Tweaked: 8


tRRD:
Small influence on stability / Small influence on bandwidth
tRRD of 2 didnt change the results. Nor did a tRRD of 4. This is a delay-timing so a too low value may result in recalculation.
Recommendation: Auto for oc/normal usage. 4 if you want to push mhz. Tweaked: 2


tRC:
Medium influence on stability / Large influence on bandwidth
This timing is quite surprising. Going from 30 to 21 gave ~90mb/s. From 23 to 21 gave ~15-20mb/s.
tRC is last timing before ram burst (data transfer).
Dont set too high. And tRC should be greater than tRAS + tRP or you might get corruption.
Recommendation: 21 for normal usage. 30 if you want to push mhz. Tweaked: 15


tWR:
Small influence on stability / Small influence on bandwidth
Small change from 6 to 3. Setting timing too low will cause ram to fail switching to "read mode".
Recommendation: Auto for oc/normal usage. 6 if you want to push mhz. Tweaked: 3


tWTR:
Large influence on stability / Small influence on bandwidth
From 10 to 8 didnt change results. 6 would lock up the system. This timing gives no bonus but affects stability a lot. Use with care.
Recommendation: Auto for oc/normal usage. 10 if you want to push mhz. Tweaked: 8(7)

tREF:
Small influence on stability / Small influence on bandwidth
Changing to 3,9us didnt show improvements in benchmark. It also didnt seem to affect stability. tREF was important with DDR1.
Recommendation: Auto for oc/normal usage. 7,8us if you want to push mhz. Tweaked: 3,9us


Command Rate:
Settings are 2T/1T. You probably already know a lot about this timing.
The 680i struggles running 1T above 800mhz. So do the ram - atleast 2,2v are needed. This timing gives a great boost to bandwidth, but is fairly hard to attain. I wont recommend any setting regarding this timing. You need to find what mhz you get with 1T, then find mhz with 2T, then compare benchmarks. THE END! :)
MEMORY TIMINGS EXPLAINED....[/u]Introduction
Have you ever wondered what those numbers "2.5-3-3-8" or "2-2-2-5" and so on mean? Or have you seen words like "CAS" and "tRCD"? These are the timings for the memory, or the speed at which it processes certain commands. This whole settings area can be quite confusing and you have to have a certain knowledge of it, if you plan on overclocking. But some of you may just be plain curious as to what they are.
Rated Memory Timings.
• CAS (tCL) Timing: CAS stands for Column Address Strobe or Column Address Select. It controls the amount of time in cycles between sending a reading command and the time to act on it. From the beginning of the CAS to the end of the CAS is the latency. The lower the time of these in cycles, the higher the memory performance.
e.g.: 2.5-3-3-8 The bold "2.5" is the CAS timing.

• tRCD Timing: RAS to CAS Delay (Row Address Strobe/Select to Column Address Strobe/Select). Is the amount of time in cycles for issuing an active command and the read/write commands.
e.g.: 2.5-3-3-8 The bold "3" is the tRCD timing.

• tRP Timing: Row Precharge Time. This is the minimum time between active commands and the read/writes of the next bank on the memory module.
e.g.: 2.5-3-3-8 The bold "3" is the tRP timing.

• tRAS Timing: Min RAS Active Time. The amount of time between a row being activated by precharge and deactivated. A row cannot be deactivated until tRAS has completed. The lower this is, the faster the performance, but if it is set too low, it can cause data corruption by deactivating the row too soon.
tRAS = tCL + tRCD + tRP (+/- 1) so that it gives everything enought time before closing the bank.

e.g.: 2.5-3-3-8 The bold "8" is the tRAS timing.
(The 2.5-3-3-8 figure is just an example for memory timings.)

These are the four timings that you would see when memory is being rated. It is in the order of CAS-tRCD-tRP-tRAS. The lower these timings, the higher the performance of the memory. Some motherboard manufactors (DFI for example) list the timings in their bios CAS-tRCD-tRAS-tRP.

Certain memories can take tighter (lower) timings at higher speeds. These are the more expensive memory modules out of the bunch. There are also other timings to consider in your BIOS. Not all boards will have options like these.
http://www.techpowerup.com
Other Timings.
• Command Rate: Also called CPC (Command Per Clock). The amount of time in cycles when the chip select is executed and the commands can be issued. The lower (1T) the faster the performance, but 2T is used to maintain system stability. On Intel based machines, 1T is always used where the number of banks per channel are limited to 4.
• tRC Timing: Row Cycle Time. The minimum time in cycles it takes a row to complete a full cycle. This can be determined by; tRC = tRAS + tRP. If this is set too short it can cause corruption of data and if it is to high, it will cause a loss in performance, but increase stability.
• tRRD Timing: Row to Row Delay or RAS to RAS Delay. The amount of cycles that it takes to activate the next bank of memory. It is the opposite of tRAS. The lower the timing, the better the performance, but it can cause instability.
• tRFC Timing: Row Refresh Cycle Timing. This determines the amount of cycles to refresh a row on a memory bank. If this is set too short it can cause corruption of data and if it is too high, it will cause a loss in performance, but increased stability.
• tRW Timing: Write Recovery Time. The amount of cycles that are required after a valid write operation and precharge. This is to insure that data is written properly.
• tRTW/tRWT Timing: Read to Write Delay. When a write command is received, this is the amount of cycles for the command to be executed.
• tWTR Timing: Write to Read Delay. The amount of cycles required between a valid write command and the next read command. Lower is better performance, but can cause instability.
• tREF Timing: The amount of time it takes before a charge is refreshed so it does not lose its charge and corrupt. Measured in micro-seconds (µsec).
• tWCL Timing: Write CAS number. Write to whatever bank is open to be written too. Operates at a rate of 1T, but can be set to others. It does not seem to work with other settings than 1T on DDR. DDR2 is different though.
Conclusion
As you can see there are a lot of factors that affect the performance and stability of RAM. There are still other aspects to consider as well, but these aren't just timings. CAS-tRCD-tRP-tRAS are the main timings that are of concern to end users. CPC or Command Rate is another important one for AMD based systems when configuring or overclocking.

All of the other settings are only really changed when overclocking, or tweaking. If you plan to stay at stock settings, there is no real need to play with these settings. As stated before as well, not all BIOSes will even have these setting available. They will just be an "Auto" feature.
Hope this helps people like it did me...enjoy!! :partyman:
Gigabite EP43-DS3L,Thermaltake 500WT PS, E8400 @3771.1/1.3125Vcore W/Zalman 110mm cooler ,Gskill DDR2-1066 @1117,5,5,5,15, 1.9V, EVGA 9800GTX+ SC @856-1948-1178,3DMark06-16536, X-fi sound blaster, Segate 7200-320GB 16mb HD, CD DVD-Soni LightScribe optiarc ,modified apevia case with four 120mm and three 80mm blue tricool fans.
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Re: Timings Explained and Discussed

Postby hercules71185 » Tue May 26, 2009 4:11 am

I wish people would post some benchmarks of different timings. Say compare a high end ram and set the timings at a low end speed instead of trying to compare $120 kit to a $20 kit.

Edit: AND without changing the Frequency. Just a 5-5-5-20 vs 4-4-4-12 vs X-X-X-X
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