AMD developing reverse Hyper-Threading?

Post by **Apoptosis** » Tue Jun 27, 2006 10:11 am

Is AMD developing reverse Hyper-Threading?

What have you guys heard about this? Allegedly, the AMD is developing reverse Hyper-Threading, which would allow two (or multiple) physical cores to emulate one physical core to compete with Conroe.

The Inq reported this week that all AM2 CPUs have been outfitted with support for Reverse-HyperThreading, an architectural change which enables software to think that it is working on a single-core alone. By combining two cores, the company has been able to produce the six IPC "core" that will go head to head against four IPC "core" from Conroe/Merom/WoodCrest combo. AMDs Reverse-HT is a dynamic technology, and with Microsoft's Windows update and a new processor driver, the driver will copy the graphics drivers of today's 3D accelerators. The driver will detect the app, see if it is multithreaded or not and turn the ReverseHT on, or leave it off.

HONkUS · Post by **HONkUS** » Tue Jun 27, 2006 10:13 am

SWEET! How would they implent this? in the form of a driver?

Bio-Hazard · Post by **Bio-Hazard** » Tue Jun 27, 2006 10:15 am

Last week Xbit-Labs and OverClockers both had articles up about it, Xbit-Labs sounded pretty positive while OverClock said it was pretty much a bunch of hype. Just got to wait and see what comes of it I guess.

http://www.xbitlabs.com/news/cpu/displa ... 43710.html

http://www.overclockers.com/tips00983/

Post by **Apoptosis** » Tue Jun 27, 2006 12:28 pm

very interesting indeed.

Post by **Illuminati** » Tue Jun 27, 2006 12:29 pm

Just wanted to let everyone know that there was a bug in Bio's post that was preventing this topic from displaying... it is now fixed.

Way to go Bio!

hehe!

Bio-Hazard · Post by **Bio-Hazard** » Tue Jun 27, 2006 12:35 pm

It wouldn't let me back in for the longest time either............

kenc51 · Post by **kenc51** » Tue Jun 27, 2006 12:44 pm

Illuminati wrote: Just wanted to let everyone know that there was a bug in Bio's post that was preventing this topic from displaying... it is now fixed.

Way to go Bio! hehe!

I found the same thing on this thread [poll]AM2 OR socket 939
`(can't provide link, as can't open it)

Bio, you have something you want to tell us? hehe

Rumor has it, Intel are doing the same thing!
http://techreport.com/onearticle.x/10247

Post by **Illuminati** » Tue Jun 27, 2006 3:19 pm

Thanks Ken... I fixed that thread as well. What I am fixing is there are some extra formatting characters being included in the tags that should not be between the ta ... ah.com\r\n[/code]
But it should have stored this:

Code: Select all

[url]www.blah.com[/url]\r\n

Both posts I fixed had this situation when the url was the last thing in the post.

Bio-Hazard · Post by **Bio-Hazard** » Wed Jun 28, 2006 2:05 pm

I was reading today that Intel was coming out with the same sort of reverse Hyper-Threading for their dual cores.............

http://www.digit-life.com/news.html?06/37/03#63703

kenc51 · Post by **kenc51** » Wed Jun 28, 2006 2:09 pm

Bio-Hazard wrote:I was reading today that Intel was coming out with the same sort of reverse Hyper-Threading for their dual cores.............

ehh...I posted that yesterday...! ;)

kenc51 wrote: Rumor has it, Intel are doing the same thing!
http://techreport.com/onearticle.x/10247

Post by **FZ1** » Wed Jun 28, 2006 2:27 pm

I heard AMD is making a chip with a built in flux capacitor which will invert the tachyon beam and blow Intel out of the water

infinitevalence · Post by **infinitevalence** » Wed Jun 28, 2006 2:35 pm

no way!!! i thought i herd a rumor of AMD making a quantum cesium decoupler that would alow thier processors to spit out results before they knew the operation!

HONkUS · Post by **HONkUS** » Wed Jun 28, 2006 3:15 pm

I heard that K8L was 7 feet tall and shot fire out its ass!

Pengwin · Post by **Pengwin** » Wed Jun 28, 2006 4:16 pm

HONkUS wrote:I heard that K8L was 7 feet tall and shot fire out its ass!

Wait....i heard that it shot it out if its ears....where are u gettin ur info.

cancer-rat · Post by **cancer-rat** » Fri Jun 30, 2006 3:04 pm

NEC has been working on something similar for a while now.

But thier technology requires a special compiler to allow code to take advantage of the increased IPC width.

I would take a guess that AMD's technology would require something similar, even though rumours say otherwise.

The process is too damn complex to simple put a bandaid driver on top of it and expect it to work.

Though having a 6 IPC virtual processor, would potentially be better than two 3 IPC physical processors, as it would allow the computer to waste less cycles on not completely utilized issuances. But the the performance advantage over a properly programmed multi-processor aware application wouldn't be that fantastic.

Though to be honest, an extra issuance per clock, be it 4 with the conroe or 6 with the antihyperthreaded athlon, isn't going to make much of a difference. You can only run so many useful stages within the cycle.

Almost all computations have prequisite computation as well as a child computation and so on. So even though you can run alot of instructions at once, most will be wasted as the next data the machine needs to crunch is waiting on the data you are crunching during the current cycle.

RANT RANT RANT

I hate the current intel/amd rivalery already. It's all marketing, but nothing all that spiffy.