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Triple SLI Flawed?

Posted: Wed Dec 05, 2007 9:29 pm
by Apoptosis
The Inq has brought up a few interesting points about NVIDIA 3-way or Triple SLI today in this post. If you're too lazy to read it I copy/pasted it below.
If you look at a circuit diagram of the 780i, you see one very standout part, the PCIe slots.

It goes something like this, and the NV diagrams, like everything that comes out of the company, is really vague and meant to make you draw the wrong conclusion. The problem is that two of the PCIe 16x slots are PCIe2 and one is PCIe1. Hmmmm. The PCIe2 slots are connected to the north bridge via a chip called the Nforce 200 bridge chip. This is rumoured to be one of the things they still haven't managed to get completely functional yet.

The one 16x PCIe1 slot may or may not be connected to the south bridge, the diagrams are purposely misleading here. In the end, you have 2 PCIe2 links 2 hops from the NB, and one PCIe1 link one hop from the SB.

See a latency problem? Thouight so. To make matters more humourous, how well do you think the third card does four hops away from the other two while running at half the speed? We sense problems in the making, do you? This could quite possibly be why the 780i and 3SLI are so delayed and fraught with problems.
Here is the circuit diagram that was leaked on the nvidia 780i:

Re: Triple SLI Flawed?

Posted: Wed Dec 05, 2007 9:42 pm
by skier
i wonder if the PCIe1 could be directly linked to the northbridge?(which would solve some of the performance handicap i would imagine)

Re: Triple SLI Flawed?

Posted: Thu Dec 06, 2007 11:00 am
by HONkUS
Yeah but thats not the point i dont think, i think for an enthusiast platform like this you would want all three PCIe 2.0 slots to run the same "route". I mean if your gonna drop that much money on 3 8800gtx's or Ultras then you want the best possible performance. The only way I can see triple SLI working at all on the chipset mentioned is if the mobo with the 780 has 3 PCIex16 2.0 slots running at 8x instead of 16x. 8 times 3 is 24 where as 16 times 2 is 32 so 3 slots at 8x speeds is very possible on this chipset. Im surprised the Inq didn't mention this. It seems like they want to stir up some contreversy imagine that :)