Hardware Setup:
- FX-57 0516WPMW water cooled
- DFI Lanparty NF4 UT SLI-DR 623-3 Official bios
- 2x BFG 7800GTX SLI
- 2x 512MB Centon PC3200LL Advance Samsung TCCD 507 6U808
- 4x 80GB Hitachi 7K80 SATAII NCQ Raid 0
- 1x 250GB Maxtor Maxline Plus PATA
- Pioneer DVD Burner
- 510W PC Powercooling SLI Psu
- WinXP Pro SP2
- Nvidia Forceware 77.72WHQL
- NF4 6.53 chipset drivers
- 1600x1200x32, 60Hz
- DirectX 9.0C
2x 512MB Centon PC3200LL Advance Samsung TCCD 507 6U808
@10x 290mhz 2.5-3-3-7 8-18-3223 at 2.64v
VID = 1.4v
VID Special = AUTO
chipset = 1.6v
LDT = 1.3v
LDT 3x
CPC = Enabled
CAS Latency(CL) = 2.5
RAS to CAS(Trcd) = 3
Min RAS# Active time(Tras) = 7
Row Precharge Time(Trp) = 3
Row Cycle Time(Trc) = 8
Row Refresh Cycle Time(Trfc) = 18
Row to Row Delay(Trrd) = 3
Write Recovery Time(Twr) = 2
Write to Read Delay(Twtr) = 2
Read to Write Delay(Trwt) = 3
Refresh Period (Tref) = 4708
Write CAS Latency(Twcl) = 1
DRAM Bank Interleave = Enabled
Skew = AUTO
Skew Value = 0
DRAM Drive Strength = Level 8
DRAM Data Drive Strength = AUTO
Max Async Latency = AUTO
DDRAM Response Time = Normal
Read Preamble Time = AUTO
Idle Cycle Limit = 256
Dynamic Counter = Disabled
R/W Queue Bypass = 16x
Bypass Max = 7x
32 byte Granularity = Disable(4burst)
Super Pi
1M = 28.265s
2M = 1m 06.016s
8M = 5m 16.203s
32M = 25m 18.265s
Everest Home 2.20.405
Read = 7,878
Write = 3,406
Latency = 36.2ns
Sandra 2005 Lite SR2a
Buffered = 7,815 / 7,714
Unbuffered = 3,713 / 3,840
PCmark04
Score = 5,751
Memory = 7,253
3dmark2001
Run 1 = 37,515
Run 2 = 37,595
=====
2x 512MB Centon PC3200LL Advance Samsung TCCD 507 6U808
@10x 290mhz 2.5-4-3-7 8-18-3223 at 2.64v
VID = 1.4v
VID Special = AUTO
chipset = 1.6v
LDT = 1.3v
LDT 3x
CPC = Enabled
CAS Latency(CL) = 2.5
RAS to CAS(Trcd) = 4
Min RAS# Active time(Tras) = 7
Row Precharge Time(Trp) = 3
Row Cycle Time(Trc) = 8
Row Refresh Cycle Time(Trfc) = 18
Row to Row Delay(Trrd) = 3
Write Recovery Time(Twr) = 2
Write to Read Delay(Twtr) = 2
Read to Write Delay(Trwt) = 3
Refresh Period (Tref) = 4708
Write CAS Latency(Twcl) = 1
DRAM Bank Interleave = Enabled
Skew = AUTO
Skew Value = 0
DRAM Drive Strength = Level 8
DRAM Data Drive Strength = AUTO
Max Async Latency = AUTO
DDRAM Response Time = Normal
Read Preamble Time = AUTO
Idle Cycle Limit = 256
Dynamic Counter = Disabled
R/W Queue Bypass = 16x
Bypass Max = 7x
32 byte Granularity = Disable(4burst)
Super Pi
1M = 28.969s
2M = 1m 06.578s
8M = 5m 19.3123s
32M = 25m 29.984s
Everest Home 2.20.405
Read = 7,744
Write = 3,381
Latency = 37.7ns
Sandra 2005 Lite SR2a
Buffered = 7,767 / 7,685
Unbuffered = 3,563 / 3,755
PCmark04
Score = 5,744
Memory = 7,240
3dmark2001
Run 1 = 37,063
Run 2 = 37,105
=====
2x 512MB Centon PC3200LL Advance Samsung TCCD 507 6U808
@10x 295mhz 2.5-4-3-7 9-22-3323 at 2.64v
VID = 1.425v
VID Special = AUTO
chipset = 1.6v
LDT = 1.3v
LDT 3x
CPC = Enabled
CAS Latency(CL) = 2.5
RAS to CAS(Trcd) = 4
Min RAS# Active time(Tras) = 7
Row Precharge Time(Trp) = 3
Row Cycle Time(Trc) = 9
Row Refresh Cycle Time(Trfc) = 22
Row to Row Delay(Trrd) = 3
Write Recovery Time(Twr) = 3
Write to Read Delay(Twtr) = 2
Read to Write Delay(Trwt) = 3
Refresh Period (Tref) = 4708
Write CAS Latency(Twcl) = 1
DRAM Bank Interleave = Enabled
Skew = AUTO
Skew Value = 0
DRAM Drive Strength = Level 8
DRAM Data Drive Strength = 2
Max Async Latency = AUTO
DDRAM Response Time = Normal
Read Preamble Time = AUTO
Idle Cycle Limit = 256
Dynamic Counter = Disabled
R/W Queue Bypass = 8x
Bypass Max = 4x
32 byte Granularity = Disable(4burst)
Super Pi
1M = 28.422s
2M = 1m 05.625s
8M = 5m 14.516s
32M = 25m 07.406s
Everest Home 2.20.405
Read = 8,020
Write = 3,422
Latency = 36.3ns
Sandra 2005 Lite SR2a
Buffered = 7,908 / 7,806
Unbuffered = 3,666 / 3,795
PCmark04
Score = 5,805
Memory = 7,357
3dmark2001
Run 1 = 37,596
Run 2 = 37,593
=====
2x 512MB Centon PC3200LL Advance Samsung TCCD 507 6U808
@14x 200mhz 2-2-2-5 7-14-2222 at 2.64v
VID = 1.4v
VID Special = AUTO
chipset = 1.6v
LDT = 1.3v
LDT 5x
CPC = Enabled
CAS Latency(CL) = 2
RAS to CAS(Trcd) = 2
Min RAS# Active time(Tras) = 5
Row Precharge Time(Trp) = 2
Row Cycle Time(Trc) = 7
Row Refresh Cycle Time(Trfc) = 14
Row to Row Delay(Trrd) = 2
Write Recovery Time(Twr) = 2
Write to Read Delay(Twtr) = 2
Read to Write Delay(Trwt) = 2
Refresh Period (Tref) = 4708
Write CAS Latency(Twcl) = 1
DRAM Bank Interleave = Enabled
Skew = AUTO
Skew Value = 0
DRAM Drive Strength = Level 8
DRAM Data Drive Strength = 2
Max Async Latency = AUTO
DDRAM Response Time = Normal
Read Preamble Time = AUTO
Idle Cycle Limit = 16
Dynamic Counter = Disabled
R/W Queue Bypass = 16x
Bypass Max = 7x
32 byte Granularity = Disable(4burst)
Super Pi
1M = 30.125s
2M = 1m 09.625s
8M = 5m 33.625s
32M = 26m 37.422s
Everest Home 2.20.405
Read = 5,851
Write = 2,642
Latency = 43.6ns
Sandra 2005 Lite SR2a
Buffered = 6,084 / 6,097
Unbuffered = 2,954 / 3,062
PCmark04
Score = 5,529
Memory = 5,939
3dmark2001
Run 1 = 35,884
Run 2 = 35,789
=====
2x 512MB Centon PC3200LL Advance Samsung TCCD 507 6U808
@15x 200mhz 2-2-2-5 7-14-2222 at 2.64v
VID = 1.45v
VID Special = AUTO
chipset = 1.6v
LDT = 1.3v
LDT 5x
CPC = Enabled
CAS Latency(CL) = 2
RAS to CAS(Trcd) = 2
Min RAS# Active time(Tras) = 5
Row Precharge Time(Trp) = 2
Row Cycle Time(Trc) = 7
Row Refresh Cycle Time(Trfc) = 14
Row to Row Delay(Trrd) = 2
Write Recovery Time(Twr) = 2
Write to Read Delay(Twtr) = 2
Read to Write Delay(Trwt) = 2
Refresh Period (Tref) = 4708
Write CAS Latency(Twcl) = 1
DRAM Bank Interleave = Enabled
Skew = AUTO
Skew Value = 0
DRAM Drive Strength = Level 8
DRAM Data Drive Strength = 2
Max Async Latency = AUTO
DDRAM Response Time = Normal
Read Preamble Time = AUTO
Idle Cycle Limit = 16
Dynamic Counter = Disabled
R/W Queue Bypass = 16x
Bypass Max = 7x
32 byte Granularity = Disable(4burst)
Super Pi
1M = 28.453s
2M = 1m 05.781s
8M = 5m 15.656s
32M = 25m 09.829s
Everest Home 2.20.405
Read = 5,998
Write = 2,661
Latency = 43.6ns
Sandra 2005 Lite SR2a
Buffered = 6,073 / 6,085
Unbuffered = 2,977 / 3,097
PCmark04
Score = 5,877
Memory = 6,059
3dmark2001
Run 1 = 37,121
Run 2 = 37,202
